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A 0.31-pJ/bit 20-Gb/s DFE With 1 Discrete Tap and 2 IIR Filters Feedback in 40-nm-LP CMOS.

Kuan-Yu ChenWei-Yung ChenShen-Iuan Liu
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2017)
Keyphrases
  • iir filters
  • high speed
  • nm technology
  • cmos technology
  • power consumption
  • low power
  • random access memory
  • silicon on insulator
  • analog to digital converter
  • objective function
  • low voltage
  • metal oxide semiconductor