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An Efficient FPGA Architecture for Reconfigurable FFT Processor Incorporating an Integration of an Improved CORDIC and Radix-2 r Algorithm.
M. S. Kavitha
P. Rangarajan
Published in:
Circuits Syst. Signal Process. (2020)
Keyphrases
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learning algorithm
hardware implementation
np hard
real time
fpga implementation
signal processing
optimal solution
computational complexity
k means
high speed
detection algorithm
frequency domain
fourier transform
parallel architecture
digital computer