Circuit Noise Interference on Sampling Clock and Its Effect on A/D Conversion.
Lei SunJianping AnYanbo WuPublished in: World Congress on Engineering (2007)
Keyphrases
- high speed
- duty cycle
- weak signal detection
- parameter space
- row column
- noise reduction
- received signal
- noise model
- image noise
- random noise
- random sampling
- signal to noise ratio
- monte carlo
- data sets
- additive noise
- real time
- circuit design
- sampling strategy
- band limited
- low pass filtering
- delay insensitive
- image structure