Low power design and its testability.
Hiroaki UedaKozo KinoshitaPublished in: Asian Test Symposium (1995)
Keyphrases
- low power
- single chip
- low power consumption
- low cost
- power consumption
- high speed
- logic circuits
- vlsi architecture
- digital signal processing
- gate array
- power dissipation
- power reduction
- high power
- mixed signal
- vlsi circuits
- image processing
- ultra low power
- cmos technology
- design considerations
- efficient implementation
- general purpose