LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect.
Pierre WodeyGeoffrey CamarroqueFabrice BarayRichard HersemeuleJean-Philippe CousinPublished in: MEMOCODE (2003)
Keyphrases
- code generation
- model checking
- formal specification
- temporal logic
- application development
- model checker
- automated verification
- formal verification
- temporal properties
- verification method
- formal methods
- finite state machines
- transition systems
- computation tree logic
- concurrent systems
- symbolic model checking
- software reuse
- bounded model checking
- model driven
- timed automata
- software development
- rapid prototyping
- epistemic logic
- data processing
- reactive systems
- databases
- design patterns
- modal logic
- data driven
- distributed systems
- user interface