Login / Signup
Adaptive Circuits for the 0.5-V Nanoscale CMOS Era.
Kiyoo Itoh
Masanao Yamaoka
Takashi Oshima
Published in:
IEICE Trans. Electron. (2010)
Keyphrases
</>
floating gate
high speed
analog vlsi
delay insensitive
circuit design
vlsi circuits
power supply
low cost
power consumption
cmos technology
power dissipation
focal plane
asynchronous circuits
data sets
random access memory
low power
case study
data mining