A reduced routing network architecture for partial parallel LDPC decoders.
Houshmand Shirani-mehrTinoosh MohseninBevan M. BaasPublished in: ACSCC (2011)
Keyphrases
- network architecture
- network layer
- artificial neural
- network infrastructure
- neural network
- neural network model
- decoding algorithm
- routing algorithm
- ldpc codes
- parallel processing
- interconnection networks
- network design
- low density parity check
- distributed processing
- routing problem
- ad hoc networks
- routing protocol
- artificial neural networks