Energy-Delay Product Minimization Techniques for On-Chip Interconnects.
Nallamothu SatyanarayanaA. Vinaya BabuPublished in: HPCNCS (2008)
Keyphrases
- power dissipation
- power consumption
- energy efficiency
- low power
- energy saving
- cmos technology
- chip design
- energy consumption
- low cost
- life cycle
- digital signal processing
- energy minimization
- ultra low power
- single chip
- input output
- high density
- product design
- product information
- high speed
- programmable logic
- analog vlsi
- real time