Login / Signup
Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL.
John G. Maneatis
Jaeha Kim
Iain McClatchie
Jay Maxey
Manjusha Shankaradas
Published in:
DAC (2003)
Keyphrases
</>
high bandwidth
end to end
application specific
low latency
high density
floating point
high speed
power consumption
real time
xml documents