Login / Signup
Design of Approximate Circuits by Fabrication of False Timing Paths: The Carry Cut-Back Adder.
Vincent Camus
Mattia Cacciotti
Jeremy Schlachter
Christian C. Enz
Published in:
IEEE J. Emerg. Sel. Topics Circuits Syst. (2018)
Keyphrases
</>
logic circuits
neural network
design process
computer aided
high level synthesis
database
real time
databases
learning algorithm
website
bayesian networks
knowledge based systems
design patterns
integrated circuit
high density
logic synthesis