Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase.
Ke XuMin ZhangChiu-sing ChoyPublished in: J. Signal Process. Syst. (2012)
Keyphrases
- low power
- abstraction levels
- low power consumption
- low cost
- single chip
- high speed
- vlsi architecture
- power consumption
- logic circuits
- low complexity
- gate array
- digital signal processing
- video decoder
- deblocking filter
- power dissipation
- cmos technology
- design process
- real time
- levels of abstraction
- ultra low power
- vlsi circuits
- mixed signal
- image sensor
- video codec
- computational complexity