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Universal logic gate for FPGA design.

Chih-Chang LinMalgorzata Marek-SadowskaDuane Gatlin
Published in: ICCAD (1994)
Keyphrases
  • user interface
  • design process
  • real time
  • case study
  • low cost
  • high speed
  • engineering design
  • hardware implementation
  • design methodology
  • single chip
  • verilog hdl