Instruction Based Synthesizable Testbench Architecture.

Ho-Seok Choi Hae-Wook Choi Sin-Chong Park

Published in: IEICE Trans. Electron. (2006)

Keyphrases

instruction set
management system
level parallelism
real time
databases
learning algorithm
software architecture
layered architecture
memory hierarchy
multimedia
data structure
expert systems
low cost
associative memory
data flow
hardware architecture