A task-level superscalar microarchitecture for large scale chip multiprocessors.

Jianqing Xiao Pengwei Lv Mian Lou Xunying Zhang Xubang Shen

Published in: RTCSA (2014)

Keyphrases

multithreading
levels of abstraction
circuit design
high speed
small scale
highly parallel
general purpose
parallel computing
coarse grained
low cost
higher level
data sets
high density
high level
computer architecture
learning algorithm
real world
neural network