Resource Constrained Hardware Architecture for Training Deep Neural Networks at the Edge - FPGA Implementation.
Alavala Venkata SurajShaik Mohammed WaseemSubir Kumar RoyPublished in: iSES (2022)
Keyphrases
- resource constrained
- fpga implementation
- hardware architecture
- hardware implementation
- field programmable gate array
- neural network
- embedded systems
- sensor networks
- resource constraints
- efficient implementation
- wireless sensor networks
- hardware architectures
- image processing algorithms
- signal processing
- multipath
- pattern recognition
- edge detection
- parallel computing
- associative memory
- computing systems
- multi agent
- genetic algorithm
- fine grained
- low cost
- artificial neural networks