Login / Signup
A network-on-chip with 3Gbps/wire serialized on-chip interconnect using adaptive control schemes.
Se-Joong Lee
Kwanho Kim
Hyejung Kim
Namjun Cho
Hoi-Jun Yoo
Published in:
DATE (2006)
Keyphrases
</>
network on chip
power dissipation
routing algorithm
interconnection networks
high speed
network simulator
multi processor
power consumption
fault tolerant
real time
data transfer
low cost
multistage
message passing
finite state machines
ad hoc networks
wireless sensor networks