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A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access energy, with bit-interleaved radiation Soft Error tolerance.
Sylvain Clerc
Fady Abouzeid
Gilles Gasiot
David Gauthier
Philippe Roche
Published in:
ESSCIRC (2012)
Keyphrases
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random access memory
error tolerance
motion vectors
high speed
nm technology
active learning
energy minimization