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A 1.2 V, 80-230 MHz, 1.75 mW Phase Locked Loop N- Integer Clock Synthesizer.
Mateus Castro
Leonardo Sulato de Moraes
Fabio Kelm Pereira
Eduardo Rodrigues de Lima
Published in:
SBCCI (2023)
Keyphrases
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power consumption
phase locked loop
high speed
clock frequency
low power
cmos technology
fpga device
multipath
text to speech
high voltage
real time
control signals
floating point
duty cycle
power supply
high frequency
decision support system
image quality
multiscale