A 148ps 135mW 64-bit adder with Constant-Delay logic in 65nm CMOS.

Pierce Chuang David Li Manoj Sachdev Vincent C. Gaudet

Published in: CICC (2012)

Keyphrases

power dissipation
power consumption
nm technology
flip flops
cmos technology
chip design
logic circuits
low power
power reduction
random access memory
power management
vlsi circuits
low voltage
silicon on insulator
high speed
low cost
mixed signal
digital signal processing
multi valued
logic programming