A 33 nJ/vector descriptor generation processor for low-power object recognition.
Dongjoo ShinInjoon HongGyeonghoon KimHoi-Jun YooPublished in: VLSIC (2015)
Keyphrases
- low power
- object recognition
- high speed
- single chip
- low cost
- gate array
- power consumption
- wireless transmission
- computer vision
- high power
- low power consumption
- cmos technology
- digital signal processing
- keypoints
- d objects
- feature vectors
- image features
- image sensor
- logic circuits
- vlsi architecture
- delay insensitive
- parallel processing
- image matching
- vlsi circuits
- wireless networks
- power reduction
- general purpose
- real time