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A 16bit 50kHz 177dB-FOMS Calibration-Free Bootstrapping-Free SC Delta-Sigma Modulator IP Block for Low-Power High-Resolution ADCs.

Alejandro SuanesMichele DeiLluís TerésFrancisco Serra-Graells
Published in: DCIS (2020)
Keyphrases
  • low power
  • delta sigma
  • analog to digital converter
  • high speed
  • high resolution
  • power consumption
  • low cost
  • mixed signal
  • noise shaping
  • image processing
  • computational complexity
  • visual quality