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ASIC-in-the-loop methodology for verification of piecewise affine controllers.
Macarena C. Martínez-Rodríguez
Piedad Brox
Javier Castro-Ramirez
Erica Tena
Antonio J. Acosta
Iluminada Baturone
Published in:
ICECS (2012)
Keyphrases
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piecewise affine
design methodology
hardware implementation
integrated circuit
model checking
multi agent systems
control system
application specific
information retrieval
high speed
multi agent
real time
case study
information systems
face verification
circuit design
hardware architecture
verification method