Performance-Constrained Transistor Sizing for Different Cell Count Minimization.

Hiroaki Yoshida Masahiro Fujita

Published in: J. Inf. Process. (2010)

Keyphrases

high speed
objective function
integrated circuit
databases
neural network
low power
data sets
circuit design
minimization problems
real time
learning algorithm
case study
multiscale
cost function
microscope images