Temperature behavior of combination selection based mismatch calibration with 65 nm CMOS technology.

Joona Marku Jonne Poikonen Ari Paasio

Published in: SoCC (2009)

Keyphrases

cmos technology
low power
power consumption
parallel processing
spl times
low voltage
power dissipation
high speed
mixed signal
low cost
image sensor
pattern recognition
image processing