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A novel deep submicron low power bus coding technique.
K. S. Sainarayanan
J. V. R. Ravindra
M. B. Srinivas
Published in:
Circuits, Signals, and Systems (2005)
Keyphrases
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low power
high speed
vlsi circuits
low cost
power consumption
deblocking filter
mixed signal
single chip
coding scheme
high power
wireless transmission
digital signal processing
coding method
low power consumption
vlsi architecture
real time
signal processor
power reduction
logic circuits
cmos technology