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A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces.

Pragoti Pran BoraDavid BorggreveFrank VanselowErkan IsaLinus Maurer
Published in: NEWCAS (2019)
Keyphrases
  • low power
  • image sensor
  • sigma delta
  • power consumption
  • low cost
  • cmos technology
  • high speed
  • vlsi circuits
  • single chip
  • digital signal processing
  • low power consumption
  • power reduction