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David Borggreve
Publication Activity (10 Years)
Years Active: 2017-2023
Publications (10 Years): 10
Top Topics
Spl Times
Errors Occur
Convolutional Neural Networks
Low Power
Top Venues
ISCAS
ICECS
MOCAST
NEWCAS
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Publications
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Lei Zhang
,
Pengcheng Xu
,
David Borggreve
,
Frank Vanselow
,
Ralf Brederlow
A FeFET In-Memory-Computing Core with Offset Cancellation for Mitigating Computational Errors.
ESSCIRC
(2023)
Johannes Weber
,
Lei Zhang
,
Pengcheng Xu
,
David Borggreve
,
Frank Vanselow
,
Eckhard Hennig
An Enhanced ACBC Three-Stage Amplifier Using Complementary Indirect Miller Compensation.
ICECS
(2023)
Harshitha Basavaraju
,
David Borggreve
,
Frank Vanselow
,
Erkan Nevzat Isa
,
Linus Maurer
A 0.8-V Fully Differential Amplifier with 80-dB DC Gain and 8-GHz GBW in 22-nm FDSOI CMOS Technology.
ISCAS
(2023)
Pengcheng Xu
,
Lei Zhang
,
Ferdinand Pscheidl
,
David Borggreve
,
Frank Vanselow
,
Ralf Brederlow
A Dynamic Charge-Transfer-Based Crossbar with Low Sensitivity to Parasitic Wire-Resistance.
ISCAS
(2022)
Harshitha Basavaraju
,
David Borggreve
,
Enno Böhme
,
Frank Vanselow
,
Erkan Nevzat Isa
,
Linus Maurer
A 0.8-V, 2.88-GHz Double-Tail Latched Comparator in 22-nm FDSOI CMOS Technology.
NorCAS
(2021)
Lei Zhang
,
David Borggreve
,
Frank Vanselow
,
Ralf Brederlow
Impact of Parasitic Wire Resistance on Accuracy and Size of Resistive Crossbars.
ISCAS
(2021)
Lei Zhang
,
David Borggreve
,
Frank Vanselow
,
Ralf Brederlow
Quantization Considerations of Dense Layers in Convolutional Neural Networks for Resistive Crossbar Implementation.
MOCAST
(2020)
Pragoti Pran Bora
,
David Borggreve
,
Frank Vanselow
,
Erkan Isa
,
Linus Maurer
A 0.8 V Low-Power 3rd order Sigma-Delta Modulator in 22 nm FDSOI CMOS Process for Sensor Interfaces.
NEWCAS
(2019)
Prajith Kumar Poongodan
,
Pragoti Pran Bora
,
David Borggreve
,
Frank Vanselow
,
Linus Maurer
A low power, offset compensated, CMOS only bandgap reference in 22 nm FD-SOI technology.
MOCAST
(2018)
Pragoti Pran Bora
,
David Borggreve
,
Frank Vanselow
,
Erkan Isa
,
Linus Maurer
Low-voltage low-distortion sampling switch design in 22 nm FD-SOI CMOS technology.
ICECS
(2017)