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The effectiveness of delay and IDDT tests in detecting resistive open defects for nanometer CMOS adder circuits.
Layla Hamieh
Nader Mehdi
Ghazalah Omeirat
Ali Chehab
Ayman I. Kayssi
Published in:
IDT (2011)
Keyphrases
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power dissipation
power consumption
low power
high speed
analog vlsi
logic circuits
vlsi circuits
delay insensitive
chip design
cmos technology
circuit design
digital signal processing
neural network
statistical tests
low voltage
automatic detection
artificial neural networks
information retrieval