FPGA Partitioning for Critical Paths.

Daniel R. Brasen Gabriele Saucier

Published in: EDAC-ETC-EUROASIC (1994)

Keyphrases

high speed
field programmable gate array
low cost
hardware implementation
decision trees
real time image processing
real time
neural network
hardware design
data sets
knowledge base
image segmentation
shortest path
single chip
partitioning algorithm