DEEP: an iterative fpga-based many-core emulation system for chip verification and architecture research.
Juergen RibutzkaYuhei HayashiFei ChenGuang R. GaoPublished in: FPGA (2011)
Keyphrases
- hardware architecture
- analog vlsi
- hardware design
- real time
- hardware implementation
- management system
- vlsi implementation
- model checking
- software architecture
- high speed
- host computer
- application specific
- cmos technology
- low cost
- functional verification
- cmos image sensor
- operating system
- memory management
- level parallelism
- chip design
- network on chip