A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors.

Sheayun Lee Jaejin Lee Chang Yun Park Sang Lyul Min

Published in: WCET (2003)

Keyphrases

instruction set
instruction set architecture
floating point
computer architecture
application specific
computational complexity
embedded systems
memory subsystem
level parallelism
ibm power processor
source code
memory requirements
memory access