Efficient Hardware Implementation of Encoder and Decoder for Golay Code.
Satyabrata SarangiSwapna BanerjeePublished in: IEEE Trans. Very Large Scale Integr. Syst. (2015)
Keyphrases
- hardware implementation
- fpga implementation
- efficient implementation
- error control
- signal processing
- video codec
- field programmable gate array
- hardware design
- software implementation
- error correction
- dedicated hardware
- parallel architecture
- turbo codes
- low complexity
- pattern recognition
- decoding process
- reed solomon