Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs.
Matthias HillerLeandro Rodrigues LimaGeorg SiglPublished in: DSD (2014)
Keyphrases
- fpga implementation
- noisy channel
- low cost
- low complexity
- hidden markov models
- real time
- hardware implementation
- decoding algorithm
- video decoder
- high speed
- hardware design
- viterbi algorithm
- field programmable gate array
- distributed video coding
- error concealment
- signal processing
- hardware architecture
- real time image processing