High Performance and Area Efficient Ferroelectric FET based Reconfigurable Logic Circuit.

Dong Han Ko Sehee Lim Young Kyu Lee Seong-Ook Jung

Published in: ISOCC (2021)

Keyphrases

cost effective
low cost
high speed
lightweight
high efficiency
evolutionary algorithm
logic programming
computationally efficient
computationally expensive
automated reasoning
logical framework
digital circuits
delay insensitive
chip design