An Architecture of a Dataflow Single Chip Processor.

Shuichi Sakai Yoshinori Yamaguchi Kei Hiraki Yuetsu Kodama Toshitsugu Yuba

Published in: ISCA (1989)

Keyphrases

single chip
low power
low cost
highly parallel
power consumption
image sensor
embedded processors
parallel computing
cmos image sensor
signal processor
real time
high speed
image enhancement
high quality
digital images
hardware and software