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A low-voltage current sorting circuit based on 4-T min-max CMOS switch.

Jordi MadrenasDaniel FernándezJordi Cosp
Published in: ICECS (2010)
Keyphrases
  • low voltage
  • min max
  • cmos technology
  • design considerations
  • power line
  • random access memory
  • high speed
  • max min
  • power management
  • low power
  • data management
  • leakage current