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A 1.1-Gb/s 115-pJ/bit Configurable MIMO Detector Using 0.13- muhboxm CMOS Technology.
Liang Liu
Fan Ye
Xiaojing Ma
Tong Zhang
Junyan Ren
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2010)
Keyphrases
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cmos technology
spl times
low power
flip flops
multiple input
low voltage
high speed
random access memory
parallel processing
power consumption
power dissipation
image sensor
low cost
mixed signal
neural network
real time
design considerations
image enhancement
image processing