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A 9-bit 100MS/s tri-level charge redistribution SAR ADC with asymmetric CDAC array.

Xiaolei ZhuYanfei ChenSanroku TsukamotoTadahiro Kuroda
Published in: VLSI-DAT (2012)
Keyphrases
  • real time
  • higher level
  • random access memory
  • analog to digital converter
  • charge coupled devices
  • multiscale
  • sar images
  • synthetic aperture radar
  • levels of abstraction