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Reconfigurable Parallel Architecture for Genetic Algorithms: Application to the Synthesis of Digital Circuits.

Edson Pedro FerlinHeitor S. LopesCarlos Raimundo Erig LimaEderson Cichaczewski
Published in: ARC (2007)
Keyphrases
  • digital circuits
  • parallel architecture
  • systolic array
  • genetic algorithm
  • hardware implementation
  • data flow
  • image segmentation
  • pattern matching
  • functional decomposition