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On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS.
Nachiket Rajderkar
Marco Ottavi
Salvatore Pontarelli
Jie Han
Fabrizio Lombardi
Published in:
DFT (2011)
Keyphrases
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cmos technology
high speed
power consumption
defect detection
database
low cost
field effect transistors
nano scale
nm technology