Login / Signup

On the Effects of Intra-gate Resistive Open Defects in Gates at Nanoscaled CMOS.

Nachiket RajderkarMarco OttaviSalvatore PontarelliJie HanFabrizio Lombardi
Published in: DFT (2011)
Keyphrases
  • cmos technology
  • high speed
  • power consumption
  • defect detection
  • database
  • low cost
  • field effect transistors
  • nano scale
  • nm technology