A low-power Content-Addressable Memory based on clustered-sparse networks.

Hooman Jarollahi Vincent Gripon Naoya Onizawa Warren J. Gross

Published in: ASAP (2013)

Keyphrases

low power
content addressable
power consumption
low cost
high speed
single chip
high power
vlsi architecture
digital signal processing
vlsi circuits
power reduction
gate array
wireless transmission
logic circuits
low power consumption
image sensor
power dissipation