Robust and Low-Power Digitally Programmable Delay Element Designs Employing Neuron-MOS Mechanism.
Renyuan ZhangMineo KanekoPublished in: ACM Trans. Design Autom. Electr. Syst. (2015)
Keyphrases
- low power
- flip flops
- power dissipation
- low cost
- power consumption
- single chip
- high speed
- signal processor
- digital signal processing
- cmos technology
- nm technology
- high power
- power reduction
- vlsi architecture
- vlsi circuits
- neural network
- low power consumption
- wireless transmission
- general purpose
- logic circuits
- wireless sensor networks
- image processing
- real time