Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search.
Philip ColangeloOren SegalAlexander SpeicherMartin MargalaPublished in: ICCE-Berlin (2020)
Keyphrases
- multi objective
- neural architecture
- field programmable gate array
- single chip
- hardware implementation
- computing systems
- real time
- search algorithm
- neural network
- low cost
- hardware architecture
- optimization algorithm
- search space
- evolutionary algorithm
- parallel computing
- high speed
- data acquisition
- feed forward
- hardware design
- objective function
- genetic algorithm
- particle swarm optimization
- image processing algorithms
- activation function
- massively parallel
- graphics processing units
- artificial neural networks
- computing platform
- efficient implementation
- reinforcement learning
- computer systems