Kilo-instruction processors, runahead and prefetching.
Tanausú RamírezAlex PajueloOliverio J. SantanaMateo ValeroPublished in: Conf. Computing Frontiers (2006)
Keyphrases
- prefetching
- cache misses
- instruction set
- response time
- access patterns
- multiprocessor systems
- access latency
- hit rate
- web prefetching
- memory access
- web caching
- multithreading
- web documents
- parallel algorithm
- hit ratio
- caching scheme
- user perceived latency
- cache replacement
- web logs
- parallel processing
- web server logs
- parallel computation
- web objects
- shared memory
- web page prediction
- processing units
- main memory