Hardware Constructions for Error Detection in WG-29 Stream Cipher Benchmarked on FPGA.
Jasmin KaurAlvaro Cintas CantoMehran Mozaffari KermaniReza AzarderakhshPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2024)
Keyphrases
- error detection
- stream cipher
- error correction
- single chip
- hardware implementation
- field programmable gate array
- secret key
- fault tolerance
- hardware architecture
- low cost
- real time
- fault isolation
- high speed
- hash functions
- security analysis
- pseudorandom
- parallel hardware
- hardware design
- fault tolerant
- smart card
- ciphertext
- similarity search
- high security
- embedded systems
- load balancing
- dedicated hardware