Low Power Rake Receiver and Viterbi Decoder Design for CDMA Applications.

Chi-Ying Tsui Roger S.-K. Cheng Curtis Ling

Published in: Wirel. Pers. Commun. (2000)

Keyphrases

low power
single chip
power consumption
low cost
high speed
vlsi architecture

digital signal processing
logic circuits
low power consumption
power dissipation
cmos technology
wireless transmission

gate array
hidden markov models
high power
ultra low power
decoding algorithm

vlsi implementation
low complexity
end to end
design process
power reduction