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Low temperature multi-layer wafer level package for chip scale atomic clock (CSAC).
Nannan Li
Yangxi Zhang
Ningli Zhu
Yunhui Zhu
Chengchen Gao
Jing Chen
Published in:
NEMS (2015)
Keyphrases
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multi layer
high speed
feed forward neural networks
neural nets
neural network
single layer
error back propagation
multiple layers
machine learning
genetic algorithm
e learning
artificial neural networks
power consumption