Hardware Trojan Insertion by Direct Modification of FPGA Configuration Bitstream.
Rajat Subhra ChakrabortyIndrasish SahaAyan PalchaudhuriGowtham Kumar NaikPublished in: IEEE Des. Test (2013)
Keyphrases
- bitstream
- field programmable gate array
- hardware implementation
- bit rate
- coding scheme
- hardware architecture
- low cost
- parallel hardware
- video decoder
- video quality
- compression algorithm
- hardware design
- real time
- single chip
- video transmission
- bit plane
- reconfigurable hardware
- low power consumption
- quality degradation
- error resilient
- error concealment
- error resilience
- rate allocation
- data acquisition
- rate distortion
- embedded systems
- frame rate
- scalable video
- xilinx virtex
- scalable video coding
- visual quality
- computing systems
- coded video
- wavelet coefficients
- compressed video
- compressed domain
- base layer
- hardware description language
- coding method
- subband
- image quality
- signal processing
- rate distortion optimized
- bit planes
- high speed
- image processing
- wireless channels
- low bit rate
- multiple description coding
- inter frame
- compression ratio
- video coding
- multiresolution