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A floorplanning-Synthesis Methodology for Multiple Chip Module Design.
Nikolaos G. Bourbakis
Mohammad Mortazavi
Published in:
Trans. SDPS (2000)
Keyphrases
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design methodology
single chip
high speed
building blocks
chip design
design process
circuit design
design tools
design space exploration
low power consumption
programmable logic
program synthesis
digital circuits
physical design
information systems
conceptual model
power consumption
low cost
case study