Memory Array Demonstration of fully integrated 1T-1C FeFET concept with separated ferroelectric MFM device in interconnect layer.
Konrad SeidelDavid LehningerRaik HoffmannTarek AliMaximilian LedererRicardo RevelloKonstantin MertensKati BiedermannYukai ShenDefu WangMatthias LandwehrAndreas HeinigThomas KämpfeHannes MähneKerstin BernertSteffen ThiemPublished in: VLSI Technology and Circuits (2022)